Training a large model is not one computer working hard; it is thousands of accelerators exchanging enormous quantities of data continuously. The network between them is frequently the limiting factor, and scaling that network has run into a constraint that is not about speed at all. It is about power.
Driving high-speed electrical signals from a switch chip across a circuit board to a pluggable optical module costs energy, and at the port counts modern AI fabrics require, that energy becomes a significant fraction of the switch's total consumption. Co-packaged optics addresses it by eliminating the distance.
What changed in 2026
- Deployment moved past trials. Co-packaged optical switches progressed from demonstrations toward production deployment in large AI clusters, driven by operators who had run out of power headroom.
- The power argument overtook the bandwidth argument. Early framing emphasized throughput; the case that actually convinced buyers was watts per bit at scale.
- Serviceability concerns shaped designs. Vendors responded to operator resistance with approaches that preserve some field-replaceability rather than fully integrating everything.
- The supply chain consolidated. Packaging optical and electronic components together requires capabilities few companies have, which concentrated the market.
Pluggable versus co-packaged
|
Pluggable optics |
Co-packaged optics |
| Optical engine location |
Front-panel module |
Adjacent to the switch die |
| Electrical trace length |
Across the board |
Millimetres |
| Power per bit |
Higher |
Substantially lower |
| Field replaceability |
Simple; swap the module |
Difficult; may require the whole assembly |
| Supply chain maturity |
Very mature, multi-vendor |
Emerging, concentrated |
| Upgrade flexibility |
Change modules independently |
Tied to the switch generation |
| Cost today |
Well understood |
Higher, improving |
Serviceability is the genuine objection, not a minor one. Optical modules fail, and in a large deployment they fail regularly. An operator who can replace a module in minutes without disturbing anything else is reluctant to adopt a design where a single optical failure implicates a much larger assembly. This is why adoption is happening first where the power constraint is most acute, rather than everywhere at once.
Why it matters beyond the datacenter
It does not, directly. No consumer device involves this technology. It matters indirectly because interconnect power is one of the constraints on how large AI clusters can grow within a given facility's power envelope, and that constraint feeds into what AI compute costs.
The same pattern appears throughout AI infrastructure right now: the bottleneck keeps moving from computation to data movement. Memory bandwidth limits how fast a single accelerator generates tokens, as covered in HBM4 explained. Packaging limits how much memory sits next to a processor, per glass substrate packaging. Network interconnect limits how many accelerators cooperate effectively. Compute is rarely the thing running out first.
Common mistakes
- Reading it as a speed technology. The primary benefit is energy per bit, not raw throughput.
- Assuming pluggables disappear. They remain appropriate for most enterprise networking, where the power constraint is not binding.
- Ignoring serviceability in total cost. Failure rates and replacement procedures affect operating cost meaningfully.
- Expecting it in enterprise gear soon. Adoption follows the power constraint, which exists at hyperscale first.
- Conflating it with silicon photonics generally. Co-packaging is one application of photonic integration among several.
FAQ
Does this make networks faster?
It enables higher aggregate bandwidth within a fixed power budget, which in practice means faster networks. The mechanism is efficiency rather than speed directly.
Will this reach enterprise datacenters?
Probably, following the usual path from hyperscale down. The timing depends on cost and on whether enterprise deployments hit the same power constraints.
What happens when an optical engine fails?
That is the open question and it varies by design. Vendors are working on approaches that limit the blast radius; operators are right to ask for specifics.
Is this related to optical computing?
No. This is optical communication between chips. Computing with light is a separate and far less mature research direction.
Where to go next
For the memory constraint, read HBM4 explained. For packaging, glass substrate packaging, and for what all of this costs to rent, AI compute leasing explained.